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DFT Engineer - IP Design (3-10 yrs) Bangalore/Noida (Semiconductor/VLSI/EDA)
Location:
Bangalore/Noida
Description:
Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for DFT Engineer to be based at Bangalore and Noida with the following: - Ideal candidate will have 3 to 10 years of experience in DFT for IP or SOC designs- Must be strong in digital logic design, DFT concepts & strong analytical ability- Proficient in synthesis with DFT, Scan insertion, ATPG, MBIST & JTAG- Expert in design and Implementation of DFT techniques like Boundary Scan, Memory BIST, Scan Insertion & ATPG at a block and top level in advanced technology nodes- Hands-on experience with industry Standard tools like Cadence, Synopsys or Mentor- Exposure to STA tool, timing closure & ECO implementation for DFT modes is a great plus- Prior experience with post-silicon debug is an added advantage.- Expertise in scripting languages such as Perl, TCL or shell- Strong problem solving & debugging skills- Good communication skills- Budget open for right candidate (ref:hirist.tech)
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DFT Engineer - IP Design (3-10 yrs) Bangalore/Noida (Semiconductor/VLSI/EDA) is a Engineering Engineer Job at MY Search located in India. Find other listings like DFT Engineer - IP Design (3-10 yrs) Bangalore/Noida (Semiconductor/VLSI/EDA) by searching Oodle for Engineering Engineer Jobs.
DFT Engineer - IP Design (3-10 yrs) Bangalore/Noida (Semiconductor/VLSI/EDA) is a Engineering Engineer Job at MY Search located in India. Find other listings like DFT Engineer - IP Design (3-10 yrs) Bangalore/Noida (Semiconductor/VLSI/EDA) by searching Oodle for Engineering Engineer Jobs.