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Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA)
Location:
Bangalore
Description:
Job Description :- Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure.- Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM.- Must have participated in all stages of the design (floor planning, placement, CTS, routing, physical verification, IREM).- Well versed with the timing closure (STA), timing closure methodologies.- Good Understanding of DRC, LVS,ERC and PERC rule files for lower tech node layout verification.- Experience in lower tech nodes (<7nm).- Good automation skills in PERL, TCL and EDA tool-specific scripting.- Able to take complete ownership for Block/sub-system for complete execution cycle.- Out of box thinking to meet tighter PPA requirements.- Any implementation experience within the field of CPU/GPU IP designs. (ref:hirist.tech)
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More About this Listing: Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA)
Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA) is a Engineering Design Engineer Job at SCH Search located in India. Find other listings like Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA) by searching Oodle for Engineering Design Engineer Jobs.
Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA) is a Engineering Design Engineer Job at SCH Search located in India. Find other listings like Physical Design Engineer - DRC/LVS (4-10 yrs) Bangalore (Semiconductor/VLSI/EDA) by searching Oodle for Engineering Design Engineer Jobs.