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Design Verification Engineer | 6 to 9 Years | Hyderabad & Bengaluru | Engineer in Engineering 1

This listing was posted on Capgemini.

Design Verification Engineer | 6 to 9 Years | Hyderabad & Bengaluru

Location:
Bangalore, Karnataka
Description:

Job Description You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven using latest industry standard methodologies and HVLs. Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases. Code coverage, Functional coverage and assertions are desired. ARM based SoC verification experience is an added advantage. Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus. Multiple positions with emphasis on AMS and Power aware verification. Should have worked on GLS. Primary Skills: Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting – Perl, Python, Shell, and Tcl. Secondary Skills: Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR
Company:
Capgemini
May 14 on Capgemini
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More About this Listing: Design Verification Engineer | 6 to 9 Years | Hyderabad & Bengaluru
Design Verification Engineer | 6 to 9 Years | Hyderabad & Bengaluru is a Engineering Engineer Job at Capgemini located in Bangalore KA. Find other listings like Design Verification Engineer | 6 to 9 Years | Hyderabad & Bengaluru by searching Oodle for Engineering Engineer Jobs.