This listing was posted on Capgemini.
Physical Design Engineer I 4 to 6 years | Bangalore
Location:
Hyderabad
Description:
Job Description: Chip level floorplanning, partitioning, timing budget generations, power planning, top PnR, CTS, block integration and ECO generation. Hands on experience in ICC and primetime. Block level implementation from netlist to GDS. Handling timing closure of high frequency blocks. Expertise in signoff closure – Timing with SI and OCV, Power, IR and physical verification at both block and chip level. Handling blocks of high instance counts – 1M instance and above. Understanding constraints and fixing techniques. Understanding SI prevention, fixing methodology and implementation. Proficient in layout edit techniques. Proficient in Synopsys ICC or Mentor Olympus and Atoptech tool set. Experience in Design Automation and UNIX system. Experience in Tcl/ PERL is a plus
Company:
Capgemini
Posted:
April 4 on Capgemini
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More About this Listing: Physical Design Engineer I 4 to 6 years | Bangalore
Physical Design Engineer I 4 to 6 years | Bangalore is a Engineering Design Engineer Job at Capgemini located in India. Find other listings like Physical Design Engineer I 4 to 6 years | Bangalore by searching Oodle for Engineering Design Engineer Jobs.
Physical Design Engineer I 4 to 6 years | Bangalore is a Engineering Design Engineer Job at Capgemini located in India. Find other listings like Physical Design Engineer I 4 to 6 years | Bangalore by searching Oodle for Engineering Design Engineer Jobs.