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Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore
Location:
Bangalore
Description:
Our leading clients provide end-to-end support for the semiconductor industry.They are looking for Physical Design to be based at Bangalore with the following skills:- Total 4 to 12 years of experience in implementation of multimillion gate SoC designs in cutting edge process technologies (28nm,16nm,14nm & below ).- Must have experience in executing block level and SOC level P&R and Timing closure activities.- Must have been responsible for owning up IR/EM/ESD simulations for the various CPU . - Must have experience in performing RTL2GDS or Netlist2GDS on blocks and/or fullchip for SoC designs executed by Foundry.- Must have strong hands-on expertise on any of the aspects of physical design including Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM and DFY and Tapeout.- Notice Period: 30 days or serving 60 days or 90 Day notice period- Education: BE/BTech, ME/MTech ( VLSI Domain ) (ref:hirist.tech)
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More About this Listing: Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore
Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore is a Engineering Design Engineer Job at MY Search located in India. Find other listings like Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore by searching Oodle for Engineering Design Engineer Jobs.
Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore is a Engineering Design Engineer Job at MY Search located in India. Find other listings like Physical Design Engineer - SoC/IP Integration (4-12 yrs) Bangalore by searching Oodle for Engineering Design Engineer Jobs.