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RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore
Location:
Bangalore
Description:
Our MNC client is a leading semiconductor company designing IC products in High-Performance Timing (Clocking), RF and Power Management area.They are looking for RTL Design to be based at Bangalore with the following : - Total 2 to 9 years of experience in working with both front-end and back-end digital design teams.- Must have expertise in module architecture and specification, mixed-signal centric digital design SOC.- Must have experience in development of RTL using Verilog/System Verilog and doing block-level testing before hand-off to verification.- Synthesis of RTL and doing quality analysis of netlist - clock gating, power, gate count analysis, gate-level simulations, LEC.- Must have worked with verification team in helping develop and review test plan for blocks and full device. (ref:hirist.tech)
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More About this Listing: RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore
RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore is a Engineering Design Engineer Job at MY Search located in India. Find other listings like RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore by searching Oodle for Engineering Design Engineer Jobs.
RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore is a Engineering Design Engineer Job at MY Search located in India. Find other listings like RTL Design Engineer - Verilog/System Verilog (2-9 yrs) Bangalore by searching Oodle for Engineering Design Engineer Jobs.