Acl Digital
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ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs)
Location:
Bangalore/Hyderabad/Pune/Noida
Description:
About the job:Job Location: Bangalore/ Hyderabad/Pune and NoidaNotice Period: 15 days to 30 DaysMinimum: 4 YearsKey Responsibilities:- Developing test plans- Coding and bring up of asm, c++ tests- UVM test bench components coding and maintaining- Debugging regression fails- Protocol: DDR,PCIE,USB,MIPIPreferred Experience:- Should have worked on Processor based System or Sub-system level verification- Hands on experience with assembly, UVM, SV, C++- Experience in developing complex test bench/model in UVM, Verilog, System Verilog- Hands on experience in developing test plans, coverage closure- Ability to code readable, maintainable and verifiable code using UVM, SV, Strong digital design concepts- Experience in developing asm/C++ tests will be an added advantage- Experience in Power Management, Clock, Reset will be an added advantage- Experience/Knowledge DPI Interface, Ruby/Perl script programming skills will be an added advantage (ref:hirist.tech)
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More About this Listing: ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs)
ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs) is a Engineering Engineer Job at ACL Digital located in India. Find other listings like ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs) by searching Oodle for Engineering Engineer Jobs.
ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs) is a Engineering Engineer Job at ACL Digital located in India. Find other listings like ACL Digital - Senior Design Verification Engineer - UVM/C++ (4-10 yrs) by searching Oodle for Engineering Engineer Jobs.